产品规格：
产品数量：
包装说明：
关 键 词：stm32如何用swd烧录程序
行 业：电子 电子产品设计
发布时间：2022-12-28
ATtiny88 Automotive 8-bit AVR Microcontroller with 8K Bytes In-System Programmable Flash DATASHEET Features High performance, low power AVR 8-Bit microcontroller Advanced RISC architecture 123 powerful instructions most single clock cycle e...
All other I/O pins take their supply voltage from VCC.1.1.3GNDGround.1.1.4Port A (PA3:0)Port A is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). ThePA[3:0] output buffers have symmetrical drive characteristics with both sink and source capabil-ity.
The Port B pins are tri-stated when a reset condition becomes active, even if the clockis not running.Depending on the clock selection fuse settings, PB6 can be used as input to the internal clockoperating circuit.The various special features of Port B are elaborated in “Alternate Functions of Port B” on page69.1.1.6Port C (PC7, PC5:0)Port C is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit).
Features•High Performance, Low Power AVR® 8-Bit Microcontroller•Advanced RISC Architecture– 123 Powerful Instructions – Most Single Clock Cycle Execution– 32 x 8 General Purpose Working Registers– Fully Static Operation•
As inputs, Port A pins that are externally pulled low will source current if the pull-up resistorsare activated. The Port A pins are tri-stated when a reset condition becomes active, even if theclock is not running.This port is available in 32-lead TQFP, 32-pad QFN and 32-ball UFBGA packages, only.1.1.5Port B (PB7:0)Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). ThePort B output buffers have symmetrical drive characteristics with both sink and source capability.As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors areactivated.
The ATtiny48/88 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISCarchitecture. By executing powerful instructions in a single clock cycle, the ATtiny48/88 achievesthroughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con-sumption versus processing speed.
