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关 键 词:三星猎户座芯片排行
行 业:电子 电子产品设计
发布时间:2022-12-22
ATtiny88 Automotive 8-bit AVR Microcontroller with 8K Bytes In-System Programmable Flash DATASHEET Features High performance, low power AVR 8-Bit microcontroller Advanced RISC architecture 123 powerful instructions most single clock cycle e...
Peripheral Features– One 8-bit Timer/Counter with Separate Prescaler and Compare Mode– One 16-bit Timer/Counter with Prescaler, and Compare and Capture Modes– 6- or 8-channel 10-bit ADC– Master/Slave SPI Serial Interface– Byte-oriented 2-wire Serial Interface (Philips I2C Compatible)– Programmable Watchdog Timer with Separate On-Chip Oscillator– On-Chip Analog Comparator– Interrupt and Wake-up on Pin Change•
ThePC7 and PC[5:0] output buffers have symmetrical drive characteristics with both sink and sourcecapability. As inputs, Port C pins that are externally pulled low will source current if the pull-upresistors are activated. The Port C pins are tri-stated when a reset condition becomes active,even if the clock is not running.1.1.7PC6/RESETIf the RSTDISBL Fuse is programmed,
High Endurance Non-volatile Memory Segments– 4K/8K Bytes of In-System Self-Programmable Flash Program Memory– 64/64 Bytes EEPROM– 256/512 Bytes Internal SRAM– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM– Data Retention: 20 years at 85°C / 100 years at 25°C– Programming Lock for Software Security•
1.1Pin Descriptions1.1.1VCCDigital supply voltage.1.1.2AVCCAVCC is the supply voltage pin for the A/D converter and a selection of I/O pins. This pin shouldbe externally connected to VCC even if the ADC is not used. If the ADC is used, it is recom-mended this pin is connected to VCC through a low-pass filter, as described in “Analog NoiseCanceling Techniques” on page 172.The following pins receive their supply voltage from AVCC: PC7, PC[5:0] and (in 32-lead pack-ages) PA[1:0].
The ATtiny48/88 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISCarchitecture. By executing powerful instructions in a single clock cycle, the ATtiny48/88 achievesthroughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con-sumption versus processing speed.