AT83C24NDS-PRTUL 车载主控
价格：面议
产品规格：
产品数量：
包装说明：
关 键 词：AT83C24NDS-PRTUL
行 业：电子 电子有源器件 专用集成电路
发布时间：2022-04-13
深圳市伟格兴电子科技有限公司是一家大型集成电路代理,分销商,公司在深圳.作为的集成电路分销商，我公司拥有丰富经验的IC销售人员，为客户提供全面的服务支持。我公司主要从事美国ADI、MAXIM，TI，ON，ST，FAIRCHILD，ADI，NXP等世界的IC和功率模块 GTR、IGBT、IPM、PIM可控硅 整流桥 二极管等，涵盖通信、半导体、仪器仪表、航天航空、计算机及周边产品、消费类电子等广泛领域。公司多，价格合理。经过我公司全体人员的共同努力， 深圳市伟格兴电子科技有限公司现已成为国有大、中型企业，企业，中小型分销商的可靠合作伙伴，业务遍及中国大陆及海外市场。 我公司在国外拥有直接的货源和存货，与国际上享有良好声誉的大量供应商建立了良好的长期合作关系。定货渠道好，周期短，以‘交货快捷、质量保证、价格合理’为服务的宗旨，保证所提供货品均为原包装。 我公司一贯坚持：“品质、服务至上”的发展宗旨以向用户提供系统 免费技术解决方案和满意的服务为己任。我们希望结交更多的合作伙伴，以合理的价格、的服务，与大家共同开创广阔的未来！同时也希望与业界同行进行广泛的交流与合作，共同为电子业繁荣发展作出自己的贡献！
全新车载DVD芯片ID9DG ID9CM ID9CG 贴片5脚电源芯片导航芯片
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
ITU_EXT_HS 6 Using External HSYNC for ITU interface.
0: Using EAV/SAV.
1: Using external HSYNC.
ITU_EXT_VS 5 Using External VSYNC for ITU interface.
0: Using EAV/SAV.
1: Using external VSYNC.
VDOE 4 Video reference Edge (for non-standard signal).
INTLAC_LOCKAVG 3 Averaging Locking timing.
LHC_MD 2 Long Horizontal Counter Mode.
1: On.
0: Off.
- 1:0 Reserved.
0Fh ASCTRL 7:0 Default : 0x90 Access : R/W
IVB (RO) 7 Input VSYNC Blanking status.
0: In display.
1: In blanking.
DLINE[2:0] 6:4 Line buffer read delay in number of lines.
INTLAC_MANSTD 3 NTSC/PAL Manual Mode
INTLAC_SETSTD 2 NTSC/PAL Setting in manual mode under run status.
0: NTSC.
1: PAL.
UNDER (RO) 1 Under run status.
OVER (RO) 0 Over run status.
10h COCTRL1 7:0 Default : 0x00 Access : R/W
- 7:6 Reserved.
AVI_SEL 5 Analog Video Input Select.
0: PC.
1: Component analog video.
DLYV 4 Analog Delay line for component analog Video input.
0: Delay 1 line.
1: Do not delay.
CSC_MD 3 Composite SYNC Cut Mode.
0: Disable.
1: Enable.
EXVS 2 External VSYNC polarity (only used when COVS is 1).
0: Normal.
1: Invert.
Sigmastar Confidential for
芯智国际有限公司
Internal Use Only
Security Level: Confidential A
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
COV_SEL 1 Coast VSYNC Select.
0: Internal VSEP.
1: External VSYNC.
CADC 0 Coast to ADC.
0: Disable.
1: Enable.
11h COCTRL2 7:0 Default : 0x00 Access : R/W
COST[7:0] 7:0 Front tuning.
00: Coast start from 1 HSYNC leading edge.
01: Coast start from 2 HSYNC leading edge, default value.
…
254: Coast start from 255 HSYNC leading edge.
255: Coast start from 256 HSYNC leading edge.
12h COCTRL3 7:0 Default : 0x00 Access : R/W
COEND[7:0] 7:0 End tuning.
00: Coast end at 1 HSYNC leading edge.
01: Coast end at 2 HSYNC leading edge, default value.
…
254: Coast end at 255 HSYNC leading edge.
255: Coast end at 256 HSYNC leading edge.
13h VFAC_OINI 7:0 Default: 0x00 Access : R/W
VFACOINI[7:0] 7:0 Vertical Factor Odd Initial value.
14h VFAC_EINI 7:0 Default: 0x80 Access : R/W
VFACEINI[7:0] 7:0 Vertical Factor Even Initial value
15h - 7:0 Default : - Access : -
- 7:0 Reserved.
16h INTCTROL 7:0 Default : 0x00 Access : R/W
CHG_HMD 7 Change H Mode for INT.
0: Only in leading/tailing of CHG period.
1: Every line generating INT pulse during CHG period.
- 6:4 Reserved.
IVSI 3 Input VSYNC interrupt generated by:
0: Leading edge.
1: Tailing edge.
OVSI 2 Output VSYNC interrupt generated by:
0: Leading edge.
1: Tailing edge.
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
VDS_MTHD 6 Input data double sample Method.
0: Using average.
1: Using advance GT filter.
IVDS 5 Input VSYNC Delay Select.
0: Delay 1/4 input HSYNC (recommended).
1: No delay.
HES 4 Input HSYNC reference Edge Select.
0: From HSYNC leading edge, default value.
1: From HSYNC tailing edge.
VES 3 Input VSYNC reference Edge Select.
0: From VSYNC leading edge, default value.
1: From VSYNC tailing edge.
ESLS 2 Early Sample Line Select.
0: 8 lines.
1: 16 lines.
VWRP 1 Input image Vertical Wrap.
0: Disable.
1: Enable.
HWRP 0 Input image Horizontal Wrap.
0: Disable.
1: Enable.
04h ISCTRL 7:0 Default : 0x10 Access : R/W
DDE 7 Direct DE mode for CCIR input.
0: Disable direct DE.
1: Enable direct DE.
DEGR[2:0] 6:4 DE or HSYNC post Glitch removal Range.
HSFL 3 Input HSYNC Filter.
0: Filter off.
1: Filter on.
ISSM 2 Input Sync Sample Mode.
0: Normal.
1: Glitch-removal.
MVD_SEL 1:0 MVD mode Select
0: CVBS.
1: S-Video.
2: YCbCr.
3: RGB.
05h SPRVST_L 7:0 Default : 0x10 Access : R/W, DB
Sigmastar Confidential for
芯智国际有限公司
Internal Use Only
Security Level: Confidential A
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
SPRVST[7:0] 7:0 Image vertical sample start point, count by input HSYNC (lower 8
bits).
06h SPRVST_H 7:0 Default : 0x00 Access : R/W, DB
- 7:3 Reserved.
SPRVST[10:8] 2:0 Image vertical sample start point, count by input HSYNC (higher 3
bits).
07h SPRHST_L 7:0 Default : 0x01 Access : R/W, DB
SPRHST[7:0] 7:0 Image horizontal sample start point, count by input dot clock
(lower 8 bits).
08h SPRHST_H 7:0 Default : 0x00 Access : R/W, DB
- 7:4 Reserved.
SPRHST[11:8] 3:0 Image horizontal sample start point, count by input dot clock
(higher 4 bits).
09h SPRVDC_L 7:0 Default : 0x10 Access : R/W, DB
SPRVDC[7:0] 7:0 Image vertical resolution (vertical display enable area count by
line; lower 8 bits).
0Ah SPRVDC_H 7:0 Default: 0x00 Access : R/W
- 7:3 Reserved.
SPRVDC[10:8] 2:0 Image vertical resolution (vertical display enable area count by
line; higher 3 bits).
0Bh SPRHDC_L 7:0 Default : 0x10 Access : R/W
SPRHDC[7:0] 7:0 Image horizontal resolution (horizontal display enable area count
by pixel; lower 8 bits).
0Ch SPRHDC_L 7:0 Default : 0x00 Access : R/W
- 7:3 Reserved.
SPRHDC[11:8] 3:0 Image horizontal resolution (horizontal display enable area count
by pixel; higher 4 bits).
0Dh LYL 7:0 Default : 0x00 Access : R/W
- 7:4 Reserved.
LYL[3:0] 3:0 Lock Y Line.
0Eh INTLX 7:0 Default : 0x00 Access : -
ITU_EXT_FIELD 7 Using External FIELD for ITU interface.
SSD102 Sigmastar LQFP-100 全新原装驱动解码IC 代用MST703-LF的详细页面。系列:SSD，:Sigmastar，型号:SSD102，类型:驱动IC，功率:，驱动芯片类型:液晶屏驱动IC，针脚数:100，用途:电视机，封装:LQFP-100，批号:2018+，特色服务:配单，应用领域:智能家居，产品说明:原厂原包装，货号:102，包装:原包装。SSD102SigmastarLQFP-100全新原装驱动解码IC代用MST703-LF。
深圳伟格兴电子，地处亚太深圳。诚信13年合作伙伴。原装质量保证。只做原装！
只做原装TI，DIODES，ON,NXP,ST，SKYWORKS,EALTEK ,RICHTEK 等国际，产品线以单片机、逻辑、运放、驱动、存储、接口IC为主
配单！优势渠道，
如您刚好有需要，可别忘记找我这个老朋友问问
