at45db161e 528字节页和512页字节
价格：面议
产品规格：
产品数量：
包装说明：
关 键 词：528字节页和512页字节,at45db161e
行 业：电子 电子产品设计
发布时间：2021-04-11
Ready/Busy status is indicated using bit 7 of the status register. If bit 7 is a 1, then the device is
not busy and is ready to accept the next command. If bit 7 is a 0, then the device is in a busy
state. The user can continuously poll bit 7 of the status register by stopping SCK at a low level
once bit 7 has been output. The status of bit 7 will continue to be output on the SO pin, and once
the device is no longer busy, the state of SO will change from 0 to 1. There are eight operations
which can cause the device to be in a busy state: Main Memory Page to Buffer Transfer, Main
Memory Page to Buffer Compare, Buffer to Main Memory Page Program with Built-in Erase,
Buffer to Main Memory Page Program without Built-in Erase, Page Erase, Block Erase, Main
Memory Page Program, and Auto Page Rewrite.
out Built-in Erase command to be utilized to reduce programming times when writing
large amounts of data to the device. To perform a Block Erase, an opcode of 50H must be
loaded into the device, followed by four reserved bits, eight address bits (PA10 - PA3), and 12
don’t care bits.
The erase operation is internally self-timed and should take place in a maximum time of tPE. During this time, the status register will indicate that the part is busy
Block Erase
A block of eight pages can be erased at one time allowing the Buffer to Main Memory Page Program with
Both the erase and the programming of
the page are internally self-timed and should take place in a maximum time of tEP. During this
time, the status register will indicate that the part is busy.
Buffer to Main Memory Page Program without Built-in Erase
Page Erase
The optional Page Erase command can be used to individually erase any page in the main
memory array allowing the Buffer to Main Memory Page Program without Built-in Erase command to be
Additional Commands
Main Memory Page to Buffer Transfer
A page of data can be transferred from the main memory to either buffer 1 or buffer 2. To start
the operation, an 8-bit opcode, 53H for buffer 1 and 55H for buffer 2, must be followed by the
four reserved bits, 11 address bits (PA10 - PA0) which specify the page in main memory that is
to be transferred, and nine don’t care bits. The CS pin must be low while toggling the SCK pin to
load the opcode, the address bits, and the don’t care bits from the SI pin. The transfer of the
page of data from the main memory to the buffer will begin when the CS pin transitions from a
low to a high state. During the transfer of a page of data (tXFR), the status register can be read to
determine whether the transfer has been completed or not.
