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产品规格:工业级
产品数量:1000000 个
包装说明:原包装
关 键 词:PIC24FJ32GA004
行 业:
发布时间:2014-02-14
High-Performance CPU: • Modified Harvard Architecture • Up to 16 MIPS Operation @ 32 MHz • 8 MHz Internal Oscillator with 4x PLL Option and Multiple Divide Options • 17-Bit by 17-Bit Single-Cycle Hardware Multiplier • 32-Bit by 16-Bit Hardware Divider • 16-Bit x 16-Bit Working Register Array • C Compiler Optimized Instruction Set Architecture: - 76 base instructions - Flexible addressing modes • Two Address Generation Units for Separate Read and Write Addressing of Data Memory Special Microcontroller Features: • Operating Voltage Range of 2.0V to 3.6V • 5.5V Tolerant Input (digital pins only) • High-Current Sink/Source (18 mA/18 mA) on All I/O Pins • Flash Program Memory: - 10,000 erase/write - 20-year data retention minimum • Power Management modes: - Sleep, Idle, Doze and Alternate Clock modes - Operating current 650 A/MIPS typical at 2.0V - Sleep current 150 nA typical at 2.0V • Fail-Safe Clock Monitor Operation: - Detects clock failure and switches to on-chip, low-power RC oscillator • On-Chip, 2.5V Regulator with Tracking mode • Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Flexible Watchdog Timer (WDT) with On-Chip, Low-Power RC Oscillator for Reliable Operation • In-Circuit Serial Programming™ (ICSP™) and In-Circuit Debug (ICD) via 2 Pins • JTAG Boundary Scan Support Analog Features: • 10-Bit, up to 13-Channel Analog-to-Digital Converter: - 500 ksps conversion rate - Conversion available during Sleep and Idle • Dual Analog Comparators with Programmable Input/Output Configuration Peripheral Features: • Peripheral Pin Select: - Allows independent I/O mapping of many peripherals - Up to 26 available pins (44-pin devices) - Continuous hardware integrity checking and safety interlocks prevent unintentional configuration changes • 8-Bit Parallel Master/Slave Port (PMP/PSP): - Up to 16-bit multiplexed addressing, with up to 11 dedicated address pins on 44-pin devices - Programmable polarity on control lines • Hardware Real-Time Clock/Calendar (RTCC): - Provides clock, calendar and alarm functions • Programmable Cyclic Redundancy Check (CRC) • Two 3-Wire/4-Wire SPI modules (support 4 Frame modes) with 8-Level FIFO Buffer • Two I2C™ modules support Multi-Master/Slave mode and 7-Bit/10-Bit Addressing • Two UART modules: - Supports RS-485, RS-232, and LIN 1.2 - On-chip hardware encoder/decoder for IrDA® - Auto-wake-up on Start bit - Auto-Baud Detect - 4-level deep FIFO buffer • Five 16-Bit Timers/Counters with Programmable Prescaler • Five 16-Bit Capture Inputs • Five 16-Bit Compare/PWM Outputs • Configurable Open-Drain Outputs on Digital I/O Pins • Up to 4 External Interrupt Sources