AT29C256-90JU 车载主控
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关 键 词:AT29C256-90JU
行 业:电子 电子有源器件 **集成电路
发布时间:2022-05-26
深圳市伟格兴电子科技有限公司是一家大型集成电路代理,分销商,公司在深圳.作为的集成电路分销商,我公司拥有丰富经验的IC销售人员,为客户提供全面的服务支持。我公司主要从事美国ADI、MAXIM,TI,ON,ST,FAIRCHILD,ADI,NXP等世界的IC和功率模块 GTR、IGBT、IPM、PIM可控硅 整流桥 二极管等,涵盖通信、半导体、仪器仪表、航天航空、计算机及周边产品、消费类电子等广泛领域。公司多,价格合理。经过我公司全体人员的共同努力, 深圳市伟格兴电子科技有限公司现已成为国有大、中型企业,企业,中小型分销商的可靠合作伙伴,业务遍及中国大陆及海外市场。 我公司在国外拥有直接的货源和存货,与国际上享有良好声誉的大量供应商建立了良好的长期合作关系。定货渠道好,周期短,以‘交货快捷、质量保证、价格合理’为服务的宗旨,保证所提供货品均为原包装。 我公司一贯坚持:“品质、服务至上”的发展宗旨以向用户提供系统 免费技术解决方案和满意的服务为己任。我们希望结交更多的合作伙伴,以合理的价格、的服务,与大家共同开创广阔的未来!同时也希望与业界**进行广泛的交流与合作,共同为电子业繁荣发展作出自己的贡献!
全新车载DVD芯片ID9DG ID9CM ID9CG 贴片5脚电源芯片导航芯片
Digital Panel Output Interface
Pin Name Pin Type Function Pin
CLKO Output Display Clock Output 53
DEO/TCON[10] Output Display Enable Output 54
VSYNCO/TCON[9] Output Vertical Sync Output / TCON Output[9] 55
HSYNCO/TCON[8] Output Horizontal Sync Output / TCON Output[8] 56
ROUT[7]/TCON[6] Output Red channel Output [7] / TCON Output[6] 67
ROUT[6]/TCON[7] Output Red channel Output [6] / TCON Output[7] 66
ROUT[5] Output Red channel Output [5] 65
Sigmastar Confidential for
芯智国际有限公司
Internal Use Only
SSD102
Smart HD Display Controller
Preliminary Data Sheet Version 0.1
Security Level: Confidential A - 8 - 2/27/2018
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Pin Name Pin Type Function Pin
ROUT[4] Output Red channel Output [4] 64
ROUT[3] Output Red channel Output [3] 63
ROUT[2] Output Red channel Output [2] 62
ROUT[1] Output Red channel Output [1] 61
ROUT[0] Output Red channel Output [0] 60
GOUT[7]/TCON[4] Output Green channel Output [7] / TCON Output[4] 75
GOUT[6]/TCON[5] Output Green channel Output [6] / TCON Output[5] 74
GOUT[5:4] Output Green channel Output [5:4] 73, 72
GOUT[3] Output Green channel Output [3] 71
GOUT[2] Output Green channel Output [2] 70
GOUT[1] Output Green channel Output [1] 69
GOUT[0] Output Green channel Output [0] 68
BOUT[7]/TCON[2] Output Blue channel Output [7] / TCON Output[2] 90
BOUT[6]/TCON[3] Output Blue channel Output [6] / TCON Output[3] 89
BOUT[5:0] Output Blue channel Output [5:0] 88-83
TCON[0] Output TCON Output[1] 92
Digital Video Input Interface
Pin Name Pin Type Function Pin
CLKIN Input w/5V-tolerant Sample Clock ITU656 Video Input 26
VD[7:0] Input w/5V-tolerant ITU656 Video Data bus 34-27
GPIO Interface
Pin Name Pin Type Function Pin
GPIOA I/O w/ 5V-tolerant General Purpose Input Output; 4mA driving strength 45
GPIOD I/O w/ 5V-tolerant General Purpose Input Output; 4mA driving strength 93
GPIOE I/O w/ 5V-tolerant General Purpose Input Output; 4mA driving strength 94
I2C Master Interface
Pin Name Pin Type Function Pin
I2CMD/TXD_SDA I/O w/ 5V-tolerant,
w/ pull-up resistor
Serial Bus Data 22
I2CMC/RXD_SCL I/O w/ 5V-tolerant
w/ pull-up resistor
Serial Bus Clock 21
Sigmastar Confidential for
芯智国际有限公司
Internal Use Only
SSD102
Smart HD Display Controller
Preliminary Data Sheet Version 0.1
Security Level: Confidential A - 9 - 2/27/2018
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Misc. Interface
Pin Name Pin Type Function Pin
RESET Schmitt Trigger Input
w/ 5V-tolerant
Hardware Reset; active high 52
XTAL_IN Analog Input Crystal Oscillator Input 99
XTAL_OUT Analog Output Crystal Oscillator Output 98
Power Pins
Pin Name Pin Type Function Pin
AVDD_ANA 3.3V Power Analog ADC Power 1
AVDD_MPLL 3.3V Power MPLL Power 100
VDDC 1.2V Power Digital Core Power 35, 57
VDDP 3.3V Power Digital Input/Output Power 23, 58, 82
AGND Ground Analog Ground 9, 97
GND Ground Ground 20, 36, 37,
49, 59, 78,
91
No Connect
Pin Name Pin Type Function Pin
NC
No Connects 76, 77,
79-81
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
TRGC 1 Trigger Condition.
0: Active low for level trigger/tailing edge trigger.
1: Active high for level trigger/leading edge trigger.
INT_TRIG 0 Interrupt Trigger.
0: Generate an edge trigger interrupt.
1: Generate a level trigger interrupt.
17h INTPULSE 7:0 Default : 0x0F Access : R/W
INTPULSE[7:0] 7:0 Interrupt Pulse width by reference clock.
18h INTSTA 7:0 Default : 0x00 Access : R/W
INTSTA[7:0] 7:0 Interrupt Status byte A.
Bit 7: MVD input NOT “no **”.
Bit 6: MVD “HSYNC lock”.
Bit 5: MVD NOT “no color”.
Bit 4: MVD degree error.
Bit 3: MVD input “no **”.
Bit 2: MVD NOT “HSYNC lock”.
Bit 1: MVD “no color”.
Bit 0: MVD HSYNC change.
19h INTENA 7:0 Default : 0x00 Access : R/W
INTENA[7:0] 7:0 Interrupt Enable control byte A.
0: Disable interrupt.
1: Enable interrupt.
1Ah INTSTB 7:0 Default : 0x00 Access : R/W
INTSTB[7:0] 7:0 Interrupt Status byte B.
Bit 7: MCU D2B interrupt 2.
Bit 6: MCU D2B interrupt 1.
Bit 5: MCU D2B interrupt 0.
Bit 4: MVD CC interrupt.
Bit 3: MVD SECAM detect.
Bit 2: MVD PAL switch error.
Bit 1: MVD “ADC7_0ACT”.
Bit 0: MVD NOT “ADC7_0ACT”.
1Bh INTENB 7:0 Default : 0x00 Access : R/C
INTENB[7:0] 7:0 Interrupt Enable control byte B.
0: Disable interrupt.
1: Enable interrupt.
1Ch INTSTC 7:0 Default : 0x00 Access : R/W
Sigmastar Confidential for
芯智国际有限公司
Internal Use Only
Security Level: Confidential A
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
INTSTC[7:0] 7:0 Interrupt Status byte C.
Bit 7: Output VSYNC interrupt.
Bit 6: Input VSYNC interrupt.
Bit 5: ATG ready interrupt.
Bit 4: ATP ready interrupt.
Bit 3: ATS ready interrupt.
Bit 2: MVD probe ready interrupt.
Bit 1: MCU D2B interrupt 4.
Bit 0: MCU D2B interrupt 3.
1Dh INTENC 7:0 Default : 0x00 Access : R/C
INTENC[7:0] 7:0 Interrupt Enable control byte C.
0: Disable interrupt.
1: Enable interrupt.
1Eh INTSTD 7:0 Default : 0x00 Access : R/W
INTSTD[7:0] 7:0 Interrupt Status byte D.
Bit 7: WDT interrupt.
Bit 6: Keypad wake-up interrupt.
Bit 5: Jitter interrupt.
Bit 4: Horizontal total change interrupt.
Bit 3: Vertical total change interrupt.
Bit 2: Horizontal lost count interrupt.
Bit 1: Vertical lost count interrupt.
Bit 0: Standard change interrupt.
1Fh INTEND 7:0 Default : 0x00 Access : R/C
INTEND[7:0] 7:0 Interrupt Enable control byte D.
0: Disable interrupt.
1: Enable interrupt.
20h ~
21h
- 7:0 Default : - Access : -
- 7:0 Reserved.
22h MPL_M 7:0 Default : 0x6F Access : R/W
MP_ICTRL[2:0] 7:5 Charge pump current set.
MPL_M[4:0] 4:0 MPLL divider ratio setting.
23h OPL_CTL0 7:0 Default : 0x40 Access : R/W
- 7:6 Reserved.
_EN 6 Output PLL spread spectrum.
0: Disable.
1: Enable
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