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关 键 词：网络硬盘存储器
行 业：电子 电子产品设计
发布时间：2021-04-15
Ready/Busy status is indicated using bit 7 of the status register. If bit 7 is a 1, then the device is
not busy and is ready to accept the next command. If bit 7 is a 0, then the device is in a busy
state. The user can continuously poll bit 7 of the status register by stopping SCK at a low level
once bit 7 has been output. The status of bit 7 will continue to be output on the SO pin, and once
the device is no longer busy, the state of SO will change from 0 to 1. There are eight operations
which can cause the device to be in a busy state: Main Memory Page to Buffer Transfer, Main
Memory Page to Buffer Compare, Buffer to Main Memory Page Program with Built-in Erase,
Buffer to Main Memory Page Program without Built-in Erase, Page Erase, Block Erase, Main
Memory Page Program, and Auto Page Rewrite.
Successive page programming operations without doing a page erase are not recommended. In
other words, changing bytes within a page from a “1” to a “0” during multiple page programming
operations without erasing that page is not recommended.
The result of the most recent Main Memory Page to Buffer Compare operation is indicated using
bit 6 of the status register. If bit 6 is a 0, then the data in the main memory page matches the
data in the buffer. If bit 6 is a 1, then at least one bit of the data in the main memory page does
not match the data in the buffer.
Data can be shifted in from the SI pin into either buffer 1 or buffer 2. To load data into either
buffer, an 8-bit opcode, 84H for buffer 1 or 87H for buffer 2, must be followed by 15 don’t care
bits and nine address bits (BFA8 - BFA0). The nine address bits specify the first byte in the
buffer to be written. The data is entered following the address bits. If the end of the data buffer is
reached, the device will wrap around back to the beginning of the buffer. Data will continue to be
loaded into the buffer until a low-to-high transition is detected on the CS pin.
The erase operation is internally self-timed and should take place in a maximum time of tPE. During this time, the status register will indicate that the part is busy
Block Erase
A block of eight pages can be erased at one time allowing the Buffer to Main Memory Page Program with
Additional Commands
Main Memory Page to Buffer Transfer
A page of data can be transferred from the main memory to either buffer 1 or buffer 2. To start
the operation, an 8-bit opcode, 53H for buffer 1 and 55H for buffer 2, must be followed by the
four reserved bits, 11 address bits (PA10 - PA0) which specify the page in main memory that is
to be transferred, and nine don’t care bits. The CS pin must be low while toggling the SCK pin to
load the opcode, the address bits, and the don’t care bits from the SI pin. The transfer of the
page of data from the main memory to the buffer will begin when the CS pin transitions from a
low to a high state. During the transfer of a page of data (tXFR), the status register can be read to
determine whether the transfer has been completed or not.
